plibsys  0.0.4
pmacroscpu.h
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1 /*
2  * The MIT License
3  *
4  * Copyright (C) 2017 Alexander Saprykin <saprykin.spb@gmail.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining
7  * a copy of this software and associated documentation files (the
8  * 'Software'), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sublicense, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be
15  * included in all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
21  * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
23  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
39 #if !defined (PLIBSYS_H_INSIDE) && !defined (PLIBSYS_COMPILATION)
40 # error "Header files shouldn't be included directly, consider using <plibsys.h> instead."
41 #endif
42 
43 #ifndef PLIBSYS_HEADER_PMACROSCPU_H
44 #define PLIBSYS_HEADER_PMACROSCPU_H
45 
46 /*
47  * List of supported CPU architectures (P_CPU_x):
48  *
49  * ALPHA - Alpha
50  * ARM - ARM architecture revision:
51  * v2, v3, v4, v5, v6, v7, v8
52  * ARM_32 - ARM 32-bit
53  * ARM_64 - ARM 64-bit
54  * ARM_V2 - ARMv2 instruction set
55  * ARM_V3 - ARMv3 instruction set
56  * ARM_V4 - ARMv4 instruction set
57  * ARM_V5 - ARMv5 instruction set
58  * ARM_V6 - ARMv6 instruction set
59  * ARM_V7 - ARMv7 instruction set
60  * ARM_V8 - ARMv8 instruction set
61  * X86 - x86 architecture revision:
62  * 3, 4, 5, 6 (Intel P6 or better)
63  * X86_32 - x86 32-bit
64  * X86_64 - x86 64-bit
65  * IA64 - Intel Itanium (IA-64)
66  * MIPS - MIPS
67  * MIPS_I - MIPS I
68  * MIPS_II - MIPS II
69  * MIPS_III - MIPS III
70  * MIPS_IV - MIPS IV
71  * MIPS_32 - MIPS32
72  * MIPS_64 - MIPS64
73  * POWER - PowerPC
74  * POWER_32 - PowerPC 32-bit
75  * POWER_64 - PowerPC 64-bit
76  * SPARC - Sparc
77  * SPARC_V8 - Sparc V8
78  * SPARC_V9 - Sparc V9
79  * HPPA - HPPA-RISC
80  * HPPA_32 - HPPA-RISC 32-bit
81  * HPPA_64 - HPPA-RISC 64-bit
82  */
83 
364 #if defined(__alpha__) || defined(__alpha) || defined(_M_ALPHA)
365 # define P_CPU_ALPHA
366 #elif defined(__arm__) || defined(__TARGET_ARCH_ARM) || defined(_ARM) || \
367  defined(_M_ARM_) || defined(__arm) || defined(__aarch64__)
368 # if defined(__aarch64__)
369 # define P_CPU_ARM_64
370 # else
371 # define P_CPU_ARM_32
372 # endif
373 # if defined(__ARM_ARCH) && __ARM_ARCH > 1
374 # define P_CPU_ARM __ARM_ARCH
375 # elif defined(__TARGET_ARCH_ARM) && __TARGET_ARCH_ARM > 1
376 # define P_CPU_ARM __TARGET_ARCH_ARM
377 # elif defined(_M_ARM) && _M_ARM > 1
378 # define P_CPU_ARM _M_ARM
379 # elif defined(__ARM64_ARCH_8__) || \
380  defined(__aarch64__) || \
381  defined(__CORE_CORTEXAV8__)
382 # define P_CPU_ARM 8
383 # define P_CPU_ARM_V8
384 # elif defined(__ARM_ARCH_7__) || \
385  defined(__ARM_ARCH_7A__) || \
386  defined(__ARM_ARCH_7R__) || \
387  defined(__ARM_ARCH_7M__) || \
388  defined(__ARM_ARCH_7S__) || \
389  defined(_ARM_ARCH_7) || \
390  defined(__CORE_CORTEXA__)
391 # define P_CPU_ARM 7
392 # define P_CPU_ARM_V7
393 # elif defined(__ARM_ARCH_6__) || \
394  defined(__ARM_ARCH_6J__) || \
395  defined(__ARM_ARCH_6T2__) || \
396  defined(__ARM_ARCH_6Z__) || \
397  defined(__ARM_ARCH_6K__) || \
398  defined(__ARM_ARCH_6ZK__) || \
399  defined(__ARM_ARCH_6M__)
400 # define P_CPU_ARM 6
401 # define P_CPU_ARM_V6
402 # elif defined(__ARM_ARCH_5__) || \
403  defined(__ARM_ARCH_5E__) || \
404  defined(__ARM_ARCH_5T__) || \
405  defined(__ARM_ARCH_5TE__) || \
406  defined(__ARM_ARCH_5TEJ__)
407 # define P_CPU_ARM 5
408 # define P_CPU_ARM_V5
409 # elif defined(__ARM_ARCH_4__) || \
410  defined(__ARM_ARCH_4T__)
411 # define P_CPU_ARM 4
412 # define P_CPU_ARM_V4
413 # elif defined(__ARM_ARCH_3__) || \
414  defined(__ARM_ARCH_3M__)
415 # define P_CPU_ARM 3
416 # define P_CPU_ARM_V3
417 # elif defined(__ARM_ARCH_2__)
418 # define P_CPU_ARM 2
419 # define P_CPU_ARM_V2
420 # endif
421 #elif defined(__i386__) || defined(__i386) || defined(_M_IX86)
422 # define P_CPU_X86_32
423 # if defined(_M_IX86)
424 # if (_M_IX86 >= 300 &&_M_IX86 <= 600)
425 # define P_CPU_X86 (_M_IX86 / 100)
426 # else
427 # define P_CPU_X86 6
428 # endif
429 # elif defined(__i686__) || defined(__athlon__) || defined(__SSE__) || defined(__pentiumpro__)
430 # define P_CPU_X86 6
431 # elif defined(__i586__) || defined(__k6__) || defined(__pentium__)
432 # define P_CPU_X86 5
433 # elif defined(__i486__) || defined(__80486__)
434 # define P_CPU_X86 4
435 # else
436 # define P_CPU_X86 3
437 # endif
438 #elif defined(__x86_64__) || defined(__x86_64) || \
439  defined(__amd64__) || defined(__amd64) || \
440  defined(_M_X64) || defined(_M_AMD64)
441 # define P_CPU_X86_64
442 # define P_CPU_X86 6
443 #elif defined(__ia64__) || defined(__ia64) || defined(_M_IA64)
444 # define P_CPU_IA64
445 #elif defined(__mips__) || defined(__mips) || defined(_M_MRX000)
446 # define P_CPU_MIPS
447 # if defined(_M_MRX000)
448 # if (_M_MRX000 >= 10000)
449 # define P_CPU_MIPS_IV
450 # else
451 # define P_CPU_MIPS_III
452 # endif
453 # endif
454 # if defined(_MIPS_ARCH_MIPS64) || (defined(__mips) && __mips - 0 >= 64) || \
455  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS64) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS64)
456 # define P_CPU_MIPS_64
457 # elif defined(_MIPS_ARCH_MIPS32) || (defined(__mips) && __mips - 0 >= 32) || \
458  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS32) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS32)
459 # define P_CPU_MIPS_32
460 # elif defined(_MIPS_ARCH_MIPS4) || (defined(__mips) && __mips - 0 >= 4) || \
461  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS4) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS4)
462 # define P_CPU_MIPS_IV
463 # elif defined(_MIPS_ARCH_MIPS3) || (defined(__mips) && __mips - 0 >= 3) || \
464  (defined(_MIPS_ISA)&& defined(_MIPS_ISA_MIPS3) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS3)
465 # define P_CPU_MIPS_III
466 # elif defined(_MIPS_ARCH_MIPS2) || (defined(__mips) && __mips - 0 >= 2) || \
467  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS2) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS2)
468 # define P_CPU_MIPS_II
469 # elif defined(_MIPS_ARCH_MIPS1) || (defined(__mips) && __mips - 0 >= 1) || \
470  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS1) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS1)
471 # define P_CPU_MIPS_I
472 # endif
473 # if defined(P_CPU_MIPS_64)
474 # define P_CPU_MIPS_IV
475 # endif
476 # if defined(P_CPU_MIPS_IV)
477 # define P_CPU_MIPS_III
478 # endif
479 # if defined(P_CPU_MIPS_32) || defined(P_CPU_MIPS_III)
480 # define P_CPU_MIPS_II
481 # endif
482 # if defined(P_CPU_MIPS_II)
483 # define P_CPU_MIPS_I
484 # endif
485 #elif defined(__powerpc__) || defined(__powerpc) || defined(__ppc__) || defined(__ppc) || \
486  defined(_ARCH_PPC) || defined(_ARCH_PWR) || defined(_ARCH_COM) || \
487  defined(_M_PPC) || defined(_M_MPPC)
488 # define P_CPU_POWER
489 # if defined(__powerpc64__) || defined(__powerpc64) || defined(__ppc64__) || defined(__ppc64) || \
490  defined(__64BIT__) || defined(__LP64__) || defined(_LP64)
491 # define P_CPU_POWER_64
492 # else
493 # define P_CPU_POWER_32
494 # endif
495 #elif defined(__sparc__) || defined(__sparc)
496 # define P_CPU_SPARC
497 # if defined(__sparc_v9__) || defined(__sparcv9)
498 # define P_CPU_SPARC_V9
499 # elif defined(__sparc_v8__) || defined(__sparcv8)
500 # define P_CPU_SPARC_V8
501 # endif
502 #elif defined(__hppa__) || defined(__hppa)
503 # define P_CPU_HPPA
504 # if defined(_PA_RISC2_0) || defined(__RISC2_0__) || defined(__HPPA20__) || defined(__PA8000__)
505 # define P_CPU_HPPA_64
506 # else
507 # define P_CPU_HPPA_32
508 # endif
509 #endif
510 
511 /* We need this to generate full Doxygen documentation */
512 
513 #ifdef DOXYGEN
514 # ifndef P_CPU_ALPHA
515 # define P_CPU_ALPHA
516 # endif
517 # ifndef P_CPU_ARM
518 # define P_CPU_ARM
519 # endif
520 # ifndef P_CPU_ARM_32
521 # define P_CPU_ARM_32
522 # endif
523 # ifndef P_CPU_ARM_64
524 # define P_CPU_ARM_64
525 # endif
526 # ifndef P_CPU_ARM_V2
527 # define P_CPU_ARM_V2
528 # endif
529 # ifndef P_CPU_ARM_V3
530 # define P_CPU_ARM_V3
531 # endif
532 # ifndef P_CPU_ARM_V4
533 # define P_CPU_ARM_V4
534 # endif
535 # ifndef P_CPU_ARM_V5
536 # define P_CPU_ARM_V5
537 # endif
538 # ifndef P_CPU_ARM_V6
539 # define P_CPU_ARM_V6
540 # endif
541 # ifndef P_CPU_ARM_V7
542 # define P_CPU_ARM_V7
543 # endif
544 # ifndef P_CPU_ARM_V8
545 # define P_CPU_ARM_V8
546 # endif
547 # ifndef P_CPU_X86
548 # define P_CPU_X86
549 # endif
550 # ifndef P_CPU_X86_32
551 # define P_CPU_X86_32
552 # endif
553 # ifndef P_CPU_X86_64
554 # define P_CPU_X86_64
555 # endif
556 # ifndef P_CPU_IA64
557 # define P_CPU_IA64
558 # endif
559 # ifndef P_CPU_MIPS
560 # define P_CPU_MIPS
561 # endif
562 # ifndef P_CPU_MIPS_I
563 # define P_CPU_MIPS_I
564 # endif
565 # ifndef P_CPU_MIPS_II
566 # define P_CPU_MIPS_II
567 # endif
568 # ifndef P_CPU_MIPS_III
569 # define P_CPU_MIPS_III
570 # endif
571 # ifndef P_CPU_MIPS_IV
572 # define P_CPU_MIPS_IV
573 # endif
574 # ifndef P_CPU_MIPS_32
575 # define P_CPU_MIPS_32
576 # endif
577 # ifndef P_CPU_MIPS_64
578 # define P_CPU_MIPS_64
579 # endif
580 # ifndef P_CPU_POWER
581 # define P_CPU_POWER
582 # endif
583 # ifndef P_CPU_POWER_32
584 # define P_CPU_POWER_32
585 # endif
586 # ifndef P_CPU_POWER_64
587 # define P_CPU_POWER_64
588 # endif
589 # ifndef P_CPU_SPARC
590 # define P_CPU_SPARC
591 # endif
592 # ifndef P_CPU_SPARC_V8
593 # define P_CPU_SPARC_V8
594 # endif
595 # ifndef P_CPU_SPARC_V9
596 # define P_CPU_SPARC_V9
597 # endif
598 # ifndef P_CPU_HPPA
599 # define P_CPU_HPPA
600 # endif
601 # ifndef P_CPU_HPPA_32
602 # define P_CPU_HPPA_32
603 # endif
604 # ifndef P_CPU_HPPA_64
605 # define P_CPU_HPPA_64
606 # endif
607 #endif
608 
609 #endif /* PLIBSYS_HEADER_PMACROSCPU_H */
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