plibsys 0.0.5
pmacroscpu.h
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1/*
2 * The MIT License
3 *
4 * Copyright (C) 2017-2024 Alexander Saprykin <saprykin.spb@gmail.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * 'Software'), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be
15 * included in all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
21 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
39#if !defined (PLIBSYS_H_INSIDE) && !defined (PLIBSYS_COMPILATION)
40# error "Header files shouldn't be included directly, consider using <plibsys.h> instead."
41#endif
42
43#ifndef PLIBSYS_HEADER_PMACROSCPU_H
44#define PLIBSYS_HEADER_PMACROSCPU_H
45
46/*
47 * List of supported CPU architectures (P_CPU_x):
48 *
49 * ALPHA - Alpha
50 * ARM - ARM architecture revision:
51 * v2, v3, v4, v5, v6, v7, v8, v9
52 * ARM_32 - ARM 32-bit
53 * ARM_64 - ARM 64-bit
54 * ARM_V2 - ARMv2 instruction set
55 * ARM_V3 - ARMv3 instruction set
56 * ARM_V4 - ARMv4 instruction set
57 * ARM_V5 - ARMv5 instruction set
58 * ARM_V6 - ARMv6 instruction set
59 * ARM_V7 - ARMv7 instruction set
60 * ARM_V8 - ARMv8 instruction set
61 * ARM_V9 - ARMv9 instruction set
62 * X86 - x86 architecture revision:
63 * 3, 4, 5, 6 (Intel P6 or better)
64 * X86_32 - x86 32-bit
65 * X86_64 - x86 64-bit
66 * IA64 - Intel Itanium (IA-64)
67 * MIPS - MIPS
68 * MIPS_I - MIPS I
69 * MIPS_II - MIPS II
70 * MIPS_III - MIPS III
71 * MIPS_IV - MIPS IV
72 * MIPS_V - MIPS V
73 * MIPS_32 - MIPS32
74 * MIPS_64 - MIPS64
75 * POWER - PowerPC
76 * POWER_32 - PowerPC 32-bit
77 * POWER_64 - PowerPC 64-bit
78 * SPARC - Sparc
79 * SPARC_V8 - Sparc V8
80 * SPARC_V9 - Sparc V9
81 * HPPA - HPPA-RISC
82 * HPPA_32 - HPPA-RISC 32-bit
83 * HPPA_64 - HPPA-RISC 64-bit
84 * S390 - IBM S/390
85 * S390X - IBM S/390x
86 * RISCV - RISC-V
87 * RISCV_32 - RISC-V 32-bit
88 * RISCV_64 - RISC-V 64-bit
89 * LOONGARCH - LoongArch
90 * LOONGARCH_32 - LoongArch 32-bit
91 * LOONGARCH_64 - LoongArch 64-bit
92 * E2K - Elbrus 2000
93 */
94
473#if defined(__alpha__) || defined(__alpha) || defined(_M_ALPHA)
474# define P_CPU_ALPHA
475#elif defined(__arm__) || defined(__TARGET_ARCH_ARM) || defined(_ARM) || \
476 defined(_M_ARM) || defined(_M_ARM64) || defined(__arm) || defined(__aarch64__) || \
477 defined(__ARM64__) || defined(__arm64__) || defined(__arm64)
478# if defined(__aarch64__) || defined(_M_ARM64) || defined(__ARM64__) || \
479 defined(__arm64__) || defined(__arm64)
480# define P_CPU_ARM_64
481# else
482# define P_CPU_ARM_32
483# endif
484# if defined(__ARM_ARCH) && __ARM_ARCH > 1
485# define P_CPU_ARM __ARM_ARCH
486# elif defined(__TARGET_ARCH_ARM) && __TARGET_ARCH_ARM > 1
487# define P_CPU_ARM __TARGET_ARCH_ARM
488# elif defined(_M_ARM) && _M_ARM > 1
489# define P_CPU_ARM _M_ARM
490# elif defined(__ARM_ARCH_9__)
491# define P_CPU_ARM 9
492# elif defined(__ARM64_ARCH_8__) || \
493 defined(__ARM_ARCH_8__) || \
494 defined(__ARM_ARCH_8A__) || \
495 defined(__aarch64__) || \
496 defined(__ARMv8__) || \
497 defined(__ARMv8_A__) || \
498 defined(_M_ARM64) || \
499 defined(__CORE_CORTEXAV8__)
500# define P_CPU_ARM 8
501# elif defined(__ARM_ARCH_7__) || \
502 defined(__ARM_ARCH_7A__) || \
503 defined(__ARM_ARCH_7R__) || \
504 defined(__ARM_ARCH_7M__) || \
505 defined(__ARM_ARCH_7S__) || \
506 defined(_ARM_ARCH_7) || \
507 defined(__CORE_CORTEXA__)
508# define P_CPU_ARM 7
509# elif defined(__ARM_ARCH_6__) || \
510 defined(__ARM_ARCH_6J__) || \
511 defined(__ARM_ARCH_6T2__) || \
512 defined(__ARM_ARCH_6Z__) || \
513 defined(__ARM_ARCH_6K__) || \
514 defined(__ARM_ARCH_6ZK__) || \
515 defined(__ARM_ARCH_6M__)
516# define P_CPU_ARM 6
517# elif defined(__ARM_ARCH_5__) || \
518 defined(__ARM_ARCH_5E__) || \
519 defined(__ARM_ARCH_5T__) || \
520 defined(__ARM_ARCH_5TE__) || \
521 defined(__ARM_ARCH_5TEJ__)
522# define P_CPU_ARM 5
523# elif defined(__ARM_ARCH_4__) || \
524 defined(__ARM_ARCH_4T__)
525# define P_CPU_ARM 4
526# elif defined(__ARM_ARCH_3__) || \
527 defined(__ARM_ARCH_3M__)
528# define P_CPU_ARM 3
529# elif defined(__ARM_ARCH_2__)
530# define P_CPU_ARM 2
531# else
532# define P_CPU_ARM 0
533# endif
534# if P_CPU_ARM == 9
535# define P_CPU_ARM_V9
536# elif P_CPU_ARM == 8
537# define P_CPU_ARM_V8
538# elif P_CPU_ARM == 7
539# define P_CPU_ARM_V7
540# elif P_CPU_ARM == 6
541# define P_CPU_ARM_V6
542# elif P_CPU_ARM == 5
543# define P_CPU_ARM_V5
544# elif P_CPU_ARM == 4
545# define P_CPU_ARM_V4
546# elif P_CPU_ARM == 3
547# define P_CPU_ARM_V3
548# elif P_CPU_ARM == 2
549# define P_CPU_ARM_V2
550# else
551# error "ARM architecture is uknown or too old"
552# endif
553#elif defined(__i386__) || defined(__i386) || defined(_M_IX86)
554# define P_CPU_X86_32
555# if defined(_M_IX86)
556# if (_M_IX86 >= 300 &&_M_IX86 <= 600)
557# define P_CPU_X86 (_M_IX86 / 100)
558# else
559# define P_CPU_X86 6
560# endif
561# elif defined(__i686__) || defined(__athlon__) || defined(__SSE__) || defined(__pentiumpro__)
562# define P_CPU_X86 6
563# elif defined(__i586__) || defined(__k6__) || defined(__pentium__)
564# define P_CPU_X86 5
565# elif defined(__i486__) || defined(__80486__)
566# define P_CPU_X86 4
567# else
568# define P_CPU_X86 3
569# endif
570#elif defined(__x86_64__) || defined(__x86_64) || \
571 defined(__amd64__) || defined(__amd64) || \
572 defined(_M_X64) || defined(_M_AMD64)
573# define P_CPU_X86_64
574# define P_CPU_X86 6
575#elif defined(__ia64__) || defined(__ia64) || defined(_M_IA64)
576# define P_CPU_IA64
577#elif defined(__mips__) || defined(__mips) || defined(_M_MRX000)
578# define P_CPU_MIPS
579# if defined(_M_MRX000)
580# if (_M_MRX000 >= 10000)
581# define P_CPU_MIPS_IV
582# else
583# define P_CPU_MIPS_III
584# endif
585# endif
586# if defined(_MIPS_ARCH_MIPS64) || defined(__mips64) || (defined(__mips) && __mips - 0 >= 64) || \
587 (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS64) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS64)
588# define P_CPU_MIPS_64
589# elif defined(_MIPS_ARCH_MIPS32) || defined(__mips32) || (defined(__mips) && __mips - 0 >= 32) || \
590 (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS32) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS32)
591# define P_CPU_MIPS_32
592# elif defined(_MIPS_ARCH_MIPS5) || (defined(__mips) && __mips - 0 >= 5) || \
593 (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS5) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS5)
594# define P_CPU_MIPS_V
595# elif defined(_MIPS_ARCH_MIPS4) || (defined(__mips) && __mips - 0 >= 4) || \
596 (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS4) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS4)
597# define P_CPU_MIPS_IV
598# elif defined(_MIPS_ARCH_MIPS3) || (defined(__mips) && __mips - 0 >= 3) || \
599 (defined(_MIPS_ISA)&& defined(_MIPS_ISA_MIPS3) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS3)
600# define P_CPU_MIPS_III
601# elif defined(_MIPS_ARCH_MIPS2) || (defined(__mips) && __mips - 0 >= 2) || \
602 (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS2) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS2)
603# define P_CPU_MIPS_II
604# elif defined(_MIPS_ARCH_MIPS1) || (defined(__mips) && __mips - 0 >= 1) || \
605 (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS1) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS1)
606# define P_CPU_MIPS_I
607# endif
608# if defined(P_CPU_MIPS_64)
609# define P_CPU_MIPS_V
610# endif
611# if defined(P_CPU_MIPS_V)
612# define P_CPU_MIPS_IV
613# endif
614# if defined(P_CPU_MIPS_IV)
615# define P_CPU_MIPS_III
616# endif
617# if defined(P_CPU_MIPS_32) || defined(P_CPU_MIPS_III)
618# define P_CPU_MIPS_II
619# endif
620# if defined(P_CPU_MIPS_II)
621# define P_CPU_MIPS_I
622# endif
623#elif defined(__powerpc__) || defined(__powerpc) || defined(__ppc__) || defined(__ppc) || \
624 defined(_ARCH_PPC) || defined(_ARCH_PWR) || defined(_ARCH_COM) || \
625 defined(_M_PPC) || defined(_M_MPPC)
626# define P_CPU_POWER
627# if defined(__powerpc64__) || defined(__powerpc64) || defined(__ppc64__) || defined(__ppc64) || \
628 defined(__64BIT__) || defined(__LP64__) || defined(_LP64)
629# define P_CPU_POWER_64
630# else
631# define P_CPU_POWER_32
632# endif
633#elif defined(__sparc__) || defined(__sparc)
634# define P_CPU_SPARC
635# if defined(__sparc_v9__) || defined(__sparcv9)
636# define P_CPU_SPARC_V9
637# elif defined(__sparc_v8__) || defined(__sparcv8)
638# define P_CPU_SPARC_V8
639# endif
640#elif defined(__hppa__) || defined(__hppa)
641# define P_CPU_HPPA
642# if defined(_PA_RISC2_0) || defined(__RISC2_0__) || defined(__HPPA20__) || defined(__PA8000__)
643# define P_CPU_HPPA_64
644# else
645# define P_CPU_HPPA_32
646# endif
647#elif defined(__s390__)
648# define P_CPU_S390
649# if defined(__s390x__)
650# define P_CPU_S390X
651# endif
652#elif defined(__riscv) || defined(__riscv__)
653# define P_CPU_RISCV
654# if defined(__riscv64) || (defined(__riscv_xlen) && (__riscv_xlen == 64))
655# define P_CPU_RISCV_64
656# else
657# define P_CPU_RISCV_32
658# endif
659#elif defined(__loongarch__)
660# define P_CPU_LOONGARCH
661# if defined(__loongarch64) || (__loongarch_grlen == 64)
662# define P_CPU_LOONGARCH_64
663# else
664# define P_CPU_LOONGARCH_32
665# endif
666#elif defined(__e2k__)
667# define P_CPU_E2K
668#endif
669
670/* We need this to generate full Doxygen documentation */
671
672#ifdef DOXYGEN
673# ifndef P_CPU_ALPHA
674# define P_CPU_ALPHA
675# endif
676# ifndef P_CPU_ARM
677# define P_CPU_ARM
678# endif
679# ifndef P_CPU_ARM_32
680# define P_CPU_ARM_32
681# endif
682# ifndef P_CPU_ARM_64
683# define P_CPU_ARM_64
684# endif
685# ifndef P_CPU_ARM_V2
686# define P_CPU_ARM_V2
687# endif
688# ifndef P_CPU_ARM_V3
689# define P_CPU_ARM_V3
690# endif
691# ifndef P_CPU_ARM_V4
692# define P_CPU_ARM_V4
693# endif
694# ifndef P_CPU_ARM_V5
695# define P_CPU_ARM_V5
696# endif
697# ifndef P_CPU_ARM_V6
698# define P_CPU_ARM_V6
699# endif
700# ifndef P_CPU_ARM_V7
701# define P_CPU_ARM_V7
702# endif
703# ifndef P_CPU_ARM_V8
704# define P_CPU_ARM_V8
705# endif
706# ifndef P_CPU_ARM_V9
707# define P_CPU_ARM_V9
708# endif
709# ifndef P_CPU_X86
710# define P_CPU_X86
711# endif
712# ifndef P_CPU_X86_32
713# define P_CPU_X86_32
714# endif
715# ifndef P_CPU_X86_64
716# define P_CPU_X86_64
717# endif
718# ifndef P_CPU_IA64
719# define P_CPU_IA64
720# endif
721# ifndef P_CPU_MIPS
722# define P_CPU_MIPS
723# endif
724# ifndef P_CPU_MIPS_I
725# define P_CPU_MIPS_I
726# endif
727# ifndef P_CPU_MIPS_II
728# define P_CPU_MIPS_II
729# endif
730# ifndef P_CPU_MIPS_III
731# define P_CPU_MIPS_III
732# endif
733# ifndef P_CPU_MIPS_IV
734# define P_CPU_MIPS_IV
735# endif
736# ifndef P_CPU_MIPS_V
737# define P_CPU_MIPS_V
738# endif
739# ifndef P_CPU_MIPS_32
740# define P_CPU_MIPS_32
741# endif
742# ifndef P_CPU_MIPS_64
743# define P_CPU_MIPS_64
744# endif
745# ifndef P_CPU_POWER
746# define P_CPU_POWER
747# endif
748# ifndef P_CPU_POWER_32
749# define P_CPU_POWER_32
750# endif
751# ifndef P_CPU_POWER_64
752# define P_CPU_POWER_64
753# endif
754# ifndef P_CPU_SPARC
755# define P_CPU_SPARC
756# endif
757# ifndef P_CPU_SPARC_V8
758# define P_CPU_SPARC_V8
759# endif
760# ifndef P_CPU_SPARC_V9
761# define P_CPU_SPARC_V9
762# endif
763# ifndef P_CPU_HPPA
764# define P_CPU_HPPA
765# endif
766# ifndef P_CPU_HPPA_32
767# define P_CPU_HPPA_32
768# endif
769# ifndef P_CPU_HPPA_64
770# define P_CPU_HPPA_64
771# endif
772# ifndef P_CPU_S390
773# define P_CPU_S390
774# endif
775# ifndef P_CPU_S390X
776# define P_CPU_S390X
777# endif
778# ifndef P_CPU_RISCV
779# define P_CPU_RISCV
780# endif
781# ifndef P_CPU_RISCV_32
782# define P_CPU_RISCV_32
783# endif
784# ifndef P_CPU_RISCV_64
785# define P_CPU_RISCV_64
786# endif
787# ifndef P_CPU_LOONGARCH
788# define P_CPU_LOONGARCH
789# endif
790# ifndef P_CPU_LOONGARCH_32
791# define P_CPU_LOONGARCH_32
792# endif
793# ifndef P_CPU_LOONGARCH_64
794# define P_CPU_LOONGARCH_64
795# endif
796# ifndef P_CPU_E2K
797# define P_CPU_E2K
798# endif
799#endif
800
801#endif /* PLIBSYS_HEADER_PMACROSCPU_H */
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